Interrupt Virtualization

IO activity is a key performance factor in virtualized environment. While CPU running in a virtual machine can achieve 90-98% of native performance, IO can only approach 40%-75%. Even with direct device assignment,  devices are still unable to reach bare-metal performance because hypervior/host intercepts all interrupts, including those interrupts generated by assigned devices to signal guest OS the completion of IO requests. The overhead includes guest-host context switch which significant degrades the performance of IO-intensive applications. It is possible to adjust the devices and their drivers to generate fewer interrupts, however, doing so may have a negative effect on latency and throughput.

Full Software-based Virtualization

In a full software-based environment, a virtual CPU (VCPU) has a virtualized LAPIC associated with it. Virtual LAPIC emulates LAPIC registers and operations. 

x86 Interrupt Virtualization

x86 hardware virtualization provides two operation modes: guest mode and host mode. The host runs in host mode and creates context for guest. Different Interrupt Descriptor Tables (IDT) are used for different modes. A device can raise an interrupt to CPU when it is either running in guest or host mode. If the CPU is running in guest mode, the CPU forces exit and deliver the interrupt to host. The host may then injects virtual interrupts to guest.

It is also possible to assign physical interrupts to guest operating system, however, with current x86 virtualization implementation, either all or no physical interrupts are delivered to current running guest.

ARM Interrupt Virtualization

In ARM architecture, Generic Interrupt Controller (GIC) handles priority and distribution of all interrupts coming to the system. GIC is programmed through MMIO access. Hypervisor reroutes interrupts to correct VM and setup corresponding virtual CPU interface for the GIC.

In GICv2, virtual CPU interface allows IRQ ACKs and EOIs without VM exit. Hypervisor sets up virtual IRQs in List Registers (LR).  GICv4 allows direct injection of virtual LPIs, which allows software describe to the Interrupt Translation Service (ITS) how physical events map to virtual interrupts.

References

1. ELI: Bare-Metal Performance for I/O Virtualization. Abel Gordon1*. Nadav Amit2*. Nadav Har'El1. Muli Ben-Yehuda21. Alex Landau1. Assaf Schuster2
2. https://sites.google.com/site/masumzh/articles/hypervisor-based-virtualization/io-and-interrupt-virtualization
3. http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0176c/ar01s03s01.html
4. http://schd.ws/hosted_files/xendeveloperanddesignsummit2017/3e/arm_vgic_xensummit_2017.pdf
5. http://infocenter.arm.com/help/topic/com.arm.doc.dai0492b/GICv3_Software_Overview_Official_Release_B.pdf